《芯片原厂必学技术之脚本篇（3-1）基于 Python、Shell 脚本和 Verilog、C 语言的文件比较环境搭建（数字 IC 验证）》https://blog.csdn.net/MicroTalent12/article/details/125016700?csdn_share_tail=%7B%22type%22%3A%22blog%22%2C%22rType%22%3A%22article%22%2C%22rId%22%3A%22125016700%22%2C%22source%22%3A%22MicroTalent12%22%7D&ctrtid=uWkDm
二、代码import operator
import numpy as np
riscv_core_verilog = []
riscv_core_cmodels = []
#import v & c data
with open("./riscv_core_v.txt", "r") as aaa_: #import verilog data
aaa__ = [line.strip() for line in aaa_]
with open("./riscv_core_c.txt", "r") as bbb_: #import c model data
bbb__ = [line.strip() for line in bbb_]
#looking for the num of data comparision
for i in range(0, N):
riscv_core_verilog.append(aaa__[i])
riscv_core_cmodels.append(bbb__[i])
#mem compare results
print('nn', "0. The Total Number of Comparision is: ")
print("***********************************************")
print("**********", len(riscv_core_verilog), "*********")
print("***********************************************")
print('n', "1. The " "ENCRYPT" " Comparision Result is: ")
if(operator.eq(riscv_core_verilog, riscv_core_cmodels)
and (len(riscv_core_verilog) == len(riscv_core_cmodels))):
print("*******************************************")
print("************* MEM COMPARE PASS ************")
print("*******************************************")
else:
print("*******************************************")
print("************* MEM COMPARE FAIL ************")
print("*******************************************")
