数字电路实验5代码

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY BICNT6BIT IS
PORT(
		CLR,UPDN,CLK,EN:IN STD_LOGIC;
		QF,QE,QD,QC,QB,QA:OUT STD_LOGIC
);
END BICNT6BIT;

ARCHITECTURE RTL OF BICNT6BIT IS
SIGNAL CNT:STD_LOGIC_VECTOR(5 DOWNTO 0);
BEGIN
	QF<=CNT(5);
	QE<=CNT(4);
	QD<=CNT(3);
	QC<=CNT(2);
	QB<=CNT(1);
	QA<=CNT(0);
PROCESS(CLK,CLR)
BEGIN
	IF CLR='1' THEN CNT<="000000";
	ELSIF CLK'EVENT AND CLK='1' THEN
		IF EN='0' THEN CNT<=CNT;
		ELSE
			IF UPDN='1' THEN CNT<=CNT + '1';
			ELSE CNT<=CNT - '1';
			END IF;
		END IF;
	END IF;
END PROCESS;
END RTL;
		

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY DIVFREQ IS
PORT(
	CLK: IN STD_LOGIC;
	F1OUT,F2OUT:OUT STD_LOGIC 
	
);
END DIVFREQ;

ARCHITECTURE RTL OF DIVFREQ IS
SIGNAL CNT1:INTEGER RANGE 0 TO 4;
SIGNAL CNT2:INTEGER RANGE 0 TO 24;
SIGNAL F1IN:STD_LOGIC;
BEGIN
F1OUT<=F1IN;
PROCESS(CLK)
BEGIN
	IF CLK'EVENT AND CLK='1' THEN
		IF CNT1=4 THEN CNT1<=0;
		ELSE CNT1<=CNT1+1;
		END IF;
	END IF;
END PROCESS;

PROCESS(CNT1)
BEGIN
	CASE CNT1 IS
	WHEN 0 TO 3 => F1IN<='0';
	WHEN 4 => F1IN<='1';
	WHEN OTHERS => F1IN<='0';
	END CASE;
END PROCESS;

PROCESS(F1IN)
BEGIN
	IF F1IN'EVENT AND F1IN='1' THEN
		IF CNT2=24 THEN CNT2<=0;
		ELSE CNT2<=CNT2+1;
		END IF;
	END IF;
END PROCESS;

PROCESS(CNT2)
BEGIN
	CASE CNT2 IS
	WHEN 0 TO 21 => F2OUT<='0';
	WHEN 22 TO 24 => F2OUT<='1';
	WHEN OTHERS => F2OUT<='0';
	END CASE;
END PROCESS;
END RTL;
		

 这里之所以用F1IN，是因为F1OUT是一个输出变量，不能放入PROCESS的括号内，因此先用F1IN代替F1OUT，最后再把F1IN的值赋给F1OUT。

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY BCD60 IS
PORT(
	CLK,EN,RST:IN STD_LOGIC;
	BCDL,BCDH:OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
	COUT: OUT STD_LOGIC
);
END BCD60;

ARCHITECTURE RTL OF BCD60 IS
SIGNAL CNTH,CNTL:STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL COLH:STD_LOGIC;
BEGIN
BCDH<=CNTH;
BCDL<=CNTL;
PROCESS(RST,CLK)
BEGIN
	IF RST='1' THEN CNTL<="0000";
	ELSIF CLK'EVENT AND CLK='1' THEN
		IF EN='1' THEN
			IF CNTL="1001" THEN CNTL<="0000";
			ELSE CNTL<=CNTL+'1';
			END IF;
		END IF;
	END IF;
END PROCESS;
COLH<='1' WHEN CNTL="1001"
			 ELSE '0';
PROCESS(RST,CLK)
BEGIN
	IF RST='1' THEN CNTH<="0000";
	ELSIF CLK'EVENT AND CLK='1' THEN
		IF COLH='1' AND EN='1' THEN
			IF CNTH="0101" THEN CNTH<="0000";
			ELSE CNTH<=CNTH+'1';
			END IF; 
		END IF;
	END IF;
END PROCESS;
COUT<='1' WHEN CNTL="1001" AND CNTH="0101"
ELSE '0';
END RTL;